when i used the syn slave fifo example to transfer data from fpga to pc,my fpga give data at the speed of 20M/s(i use a FIFO in my fpga),i still want to let the FX3 works at the PCLK of 100MHz and 32bit mode ,so i think i have to use PKTEND to transfer short packets,then the problems come. i can't get the correct data, somebody can tell me about this problems? the handbook says that the PKTEND is used at the last word to be transfer, when i transfer a short packet , can i go on transfer a full packet or a short packet and go on and go on.....,

regards.

lint

What is the data that you are getting in the PC when you are committing a short packet using pktend signal?

Are you getting any extra data for a clock cycle or you are not getting any data?

Please let me know the behaviour that you are seeing at your end.

Regards,

sai krishna.

 hello,sai krishna! thanks for your reply.

when i try to transfer one short packet, i can get it in a packet correctly but i found a extra 00 00 00 00 packet, but i just set one buffer in the FX3 ! 

another problem is that i set only one buffer for each dma channel , then when the short packet is write into the FX3, the FLAG does not show full , what does FLAG show? short packet doesn't make the FLAG show the buffer is full?

regards,

lint

 you can tell me some of the problems you found and describe here for me , so i can compare them with my problem so i can try to solve it , thank you very much!