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GPIF II 32-bit, slave fifo
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RSKV

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GPIF II 32-bit, slave fifo

RSKV posted on 24 Aug 2012 8:27 AM PST
Cypress Employee
655 Forum Posts

Hi All,

If the slave fifo sync example is not working for you when GPIF 32-bit interface is used, please change the starting piece of code in the main function as shown below:

CyU3PIoMatrixConfig_t io_cfg;
    CyU3PReturnStatus_t status = CY_U3P_SUCCESS;
    CyU3PSysClockConfig_t clkCfg = {
            CyTrue,
            2, 2, 2,
            CyFalse,
            CY_U3P_SYS_CLK
    };

    /* Initialize the device */
    status = CyU3PDeviceInit (&clkCfg);
    if (status != CY_U3P_SUCCESS)
    {
        goto handle_fatal_error;
    }

    /* Initialize the caches. Enable instruction cache and keep data cache disabled.
     * The data cache is useful only when there is a large amount of CPU based memory
     * accesses. When used in simple cases, it can decrease performance due to large
     * number of cache flushes and cleans and also it adds to the complexity of the
     * code. */

Thanks,

sai krishna.







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