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FIFO slave interface in auto mode
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FIFO slave interface in auto mode

giginjose posted on 07 Aug 2012 11:19 PM PST
Top Contributor
36 Forum Posts

Hi,

I am working on slave FIFO intereface for FX2LP usb controller.  I am configuring the FIFO in auto mode. 

Once the master gives the 8bit data to the slave FIFO bus (FD0-FD7), I am expecting the data to be commited to the USB endpoint buffer with the following code segment : 

I am using EP2 as bulk in endpoint and I am disabling all other endpoints

SYNCDELAY;                    // 

EP2CFG = 0xE0;                // bulk endpoint and quad buffering

SYNCDELAY;                    //

EP6CFG &= 0x7F;          //clear valid bit 

SYNCDELAY;

EP4CFG &= 0x7F;                // clear valid bit

SYNCDELAY;                    // 

EP8CFG &= 0x7F;                // clear valid bit

SYNCDELAY;

FIFORESET = 0x80;             // activate NAK-ALL to avoid race conditions

SYNCDELAY;                    // see TRM section 15.14

FIFORESET = 0x02;             // reset, FIFO 2

SYNCDELAY;                    // 

FIFORESET = 0x04;             // reset, FIFO 4

SYNCDELAY;                    // 

FIFORESET = 0x06;             // reset, FIFO 6

SYNCDELAY;                    // 

FIFORESET = 0x08;             // reset, FIFO 8

SYNCDELAY;                    // 

FIFORESET = 0x00;             // deactivate NAK-ALL

SYNCDELAY;                    // 

EP2FIFOCFG = 0x08;            // AUTOIN=1, WORDWIDE=0

SYNCDELAY;                    // 

 
I am also configuring the buffer length as 512bytes as below:
   EP2AUTOINLENH = 0x02;
    SYNCDELAY;
    EP2AUTOINLENL = 0x00;
    SYNCDELAY;
 
Is this all required for passing the 8bit FIFO data from master to USB host. ? Can I read the data from master using any dotnet application as mentioned below : 
 
len = 512;
byte[] buffer = new byte[len]
ret = myDevice.BulkInEndPt.XferData(ref buffer, ref len, false);
 
Since the master gives 8bit data, I am grounding the FD[8] to FD[15] lines through 10K resistor. So, should I explicitly disable the PORTD pins. 
 
In my case, I am interfacing an 8bit cmos camera. As soon as I download the code into FX2LP RAM, the signal strength from the camera is getting too low so that I am getting a black image data as soon as I try to read the USB data from the dotnet appplication. 
And also even though the FD8 to FD15 lines are grounded, I get a high voltage lvel on some of these lines. 
Why are the are the camera interface lines getting low as soon as I start running the code ? And also, Why am I observing a voltage level on FD8 to FD15 lines even though it remains grounded ? 
 
Thank You
 
 

 




Re: FIFO slave interface in auto mode

PRJI posted on 07 Aug 2012 10:18 AM PST
Cypress Employee
333 Forum Posts

 Hi,

  I have some suggestions,

   Try downloading the slave firmware available with http://www.cypress.com/?rID=43046 and check whether your interface works without low voltage issue. 

  It is not necessary to ground unused data pins, you can float those pins.

  Are you facing any issue in Host application development?. For more details on host application you can refer examples available at

C:\Cypress\Cypress Suite USB 3.4.7\CyUSB.NET\examples, after installing suite USB http://www.cypress.com/?rID=34870

Thanks

Prajith



Re: FIFO slave interface in auto mode

giginjose posted on 08 Aug 2012 11:58 PM PST
Top Contributor
36 Forum Posts

 I tried the code and not getting any low voltage issues with just endpoint configurations. 

The issue comes with FIFOPINPOLAR = 0x0C; configuration, where I have set SLRD and SLWR as active high configuration. 

The SLRD is grounded and SLWR is connected to the HSYNC. As per the observation from the CRO, my HSYNC is active high, which is why I made SLWR as active high. 

How should FIFOPINPOLAR pin be actually configured to solve the issue. 

Thank You



Re: FIFO slave interface in auto mode

giginjose posted on 14 Aug 2012 10:49 PM PST
Top Contributor
36 Forum Posts

 Prajith, 

I have tried the .hex fine inside the slave_syncB project. I added the I2C configuration routine to configure my cmos camera sensor. But still I am getting the low voltage issue ie,  the camera data signals are usually in the 3.3V range, but the hex file is burned, the signals are going below 0.5V. 

Is it a hardware issue ? I have grounded all the unused hardware lines (SLCS#, PKTEND, FIFOADR0, FIFOADR1, SLOE). 

 

Thank You



Re: FIFO slave interface in auto mode

Gayathri posted on 15 Aug 2012 06:27 AM PST
Cypress Employee
428 Forum Posts

 Hi,

 

Please create a tech support case at http://www.cypress.com/ -> Support -> Technical Support. One of our engineers can take a look at the same and help you figure out the issue. 

 

Regards,

Gayathri 



Re: FIFO slave interface in auto mode

giginjose posted on 16 Aug 2012 02:31 AM PST
Top Contributor
36 Forum Posts

 Hi, 

The issue is solved after un-grounding the SLOE pin. 

Thank You



Re: FIFO slave interface in auto mode

PRJI posted on 17 Aug 2012 10:24 PM PST
Cypress Employee
333 Forum Posts

 Thanks for posting the solution here. 






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