My understanding to dedicated flags that they are showing status of certain thread all the time regardless the current interface drivers, is it true?

I need to use asynchronous slave FIFO interface with 2-bit address and i will assign a flag for every thread, I'll have 2 input threads and 2 output threads so my expectation is to have the flags showing the status of every thread as follow:

Input threads flags showing the status full/not-full

Output threads flags showing the status empty/not-empty

I saved asynchronous FIFO example as editable project and added the 2 additional flags and configured them as dedicated flags for every thread. The objectives are:

1- I have one control in thread and one control out thread (in from PC, out to PC)

2- I have one data in thread and one data out thread

3- Control in thread has the highest priority as I should serve control transactions sent from PC all the time

4- Dedicating a flag to control in thread should allow me to detict control transactions and i will end any current transaction to execute control transaction

5- Data is streamed from/to internal FPGA FIFOs using in/out data threads.

6- As i am dedicating flags to threads, I shouldn't poll for threads flags as i can have status instantinously regardless the current thread accessed.

7- For examble if internal FPGA FIFO has a packet, I can decide if this packet ready to send by checking out thread flag in the same clock cycle.

8- I understand the latency in updating threads flags after every piece of data pumped in or out threads.

Can any experinced programmer confirm my specs, please?

M.Y. Abdulghany

Hi,

You should be able to have up to 16 signals (output, input and DMA flags) Please make sure you're alright in that aspect.

Since you're aware of the latency I assume you'll configure watermark and be using partial flag to monitor the status. Please confirm. If so, will you be sending partial packets?

In that case you'll have to use both partial flag and full flag to monitor the bus since short packets cause partial flag to trigger due to the watermark.

When you say control transaction you'll be using control enedpoint right? Didn't fully understand that. Please add more information on that.

Regards,

Anand

Control here means application level control messages and not related to USB control endpoint.

Please confirm that I'll be able to have the status of threads with dedicated flags before accessing the thread (for example the interface is IDLE or chip select is high).

Does this apply to synchronous intrefcae too?

Please look at page 5 to 9 of http://www.cypress.com/?docID=33039 it has the timing diagrams based on Asynchronous/synchronous read/write. The latency for each of the combination can be found there.

It is discussed in terms of dedicated flag.

Regards,

Anand

The diagram conflicts with the text in page 4

Note the descriptors in the SDK configure the flags as follows:

Asynchronous Slave FIFO Interface descriptor:

FLAGA is configured as an empty/full flag “current_thread”.

FLAGB is configured as a partial flag for “current_thread”.

Synchronous Slave FIFO Interface descriptor:

FLAGA is configured as an empty/full flag “current_thread”.

FLAGB is also configured as an empty/full flag for “current_thread”. In this case, FLAGB is just a duplicate of FLAGA.

This configuration can be changed according to system requirements.

this is confusing