|
Thanks for the response,
My firmware is built off of the "SlaveFifoSync" example firmware. Within the header file, a symbol is set to configure the data bus width (which I have set to a 32 bit GPIF data bus)
/* 16/32 bit GPIF Configuration select */
/* Set CY_FX_SLFIFO_GPIF_16_32BIT_CONF_SELECT = 0 for 16 bit GPIF data bus.
* Set CY_FX_SLFIFO_GPIF_16_32BIT_CONF_SELECT = 1 for 32 bit GPIF data bus.
*/
#define CY_FX_SLFIFO_GPIF_16_32BIT_CONF_SELECT (1)
Within the main() function, the code checks this value and configures the IO matrix accordingly:
#if (CY_FX_SLFIFO_GPIF_16_32BIT_CONF_SELECT == 0)
io_cfg.isDQ32Bit = CyFalse;
io_cfg.lppMode = CY_U3P_IO_MATRIX_LPP_UART_ONLY;
#else
io_cfg.isDQ32Bit = CyTrue;
io_cfg.lppMode = CY_U3P_IO_MATRIX_LPP_DEFAULT;
#endif
I also noticed that within the header file that was created with the GPIF II designer, this symbol showed up again in the "GPIF II configuration register values" section:
#if (CY_FX_SLFIFO_GPIF_16_32BIT_CONF_SELECT == 0)
0x000010A7, /* PIB_GPIF_BUS_CONFIG */
#else
0x000010AC, /* PIB_GPIF_BUS_CONFIG */
#endif
I checked my GPIF II header file and noticed that my BUS_CONFIG was set as:
0x0000016C, /* CY_U3P_PIB_GPIF_BUS_CONFIG */
I tried inserting the if statement with the register values I found in the example header file, but I am still having the original problem I described with only being able to see 8 bits on my data bus.
|