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Using SPI to configure FPGA and then enable 32-bit Slave FIFO
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Using SPI to configure FPGA and then enable 32-bit Slave FIFO

YI posted on 09 Apr 2012 3:32 PM PST
Senior Member
13 Forum Posts

Hi,

From the application mode of "Programming EZ-USB® FX3™ Processor Port as Synchronous Slave FIFO", 32 Bit data bus width is not supported if SPI is selected. After bootup, I use SPI (GPIO[53] - SPI_SCK and GPIO[56] - SPI_MOSI) to configure FPGA, then I enable GPFI to 32-bit slave FIFO mode, it is obviously doable. During firmware runtime, I want to re-configure FPGA with SPI interface again, but at that monent, GPIF is 32-bit slave FIFO mode, Can I stop GPIF or switch to 16-bit mode, using SPI re-configure FPGA, and swtich to 32-bit slave FIFO again?

Thank you!

Re: Using SPI to configure FPGA and then enable 32-bit Slave FIFO

Lumpi6 posted on 10 Apr 2012 10:48 PM PST
Top Contributor
183 Forum Posts

 Hi Yi,

Take care on this post

http://www.cypress.com/?app=forum&id=167&rID=58084

And on this post

http://www.cypress.com/?app=forum&id=167&rID=60662

Then it should work in all directions.

Regards

Lumpi



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