Hi,
In my project based on cy7c68013a I need from time to time to switch endpoint EP2 direction from OUT
to IN and vise versa.
I do it through the following steps:

void TD_Init(void)             // Called once at startup
{
    CPUCS = 0x10;                 // CLKSPD[1:0]=10, for 48MHz operation, disable CLKOUT
    SYNCDELAY;                    // see TRM section 15.14

    IFCONFIG=0xcb;       
    SYNCDELAY;                    // see TRM section 15.14
    REVCTL=0x03;
    SYNCDELAY;                    // see TRM section 15.14

//EndPoints

    FIFORESET=0x80;
    SYNCDELAY;                   
    FIFORESET=0x82;
    SYNCDELAY;                   
    FIFORESET=0x84;
    SYNCDELAY;                   
    FIFORESET=0x00;
    SYNCDELAY;                   

    EP1OUTCFG = 0xA0;
    SYNCDELAY;                    // see TRM section 15.14
    EP1INCFG = 0xA0;
    SYNCDELAY;                    // see TRM section 15.14

    EP2CFG=0xa2;        //valid, out, bulk, 512, 2 x buff
    SYNCDELAY;
     EP4CFG=0xa0;        //valid, out, bulk, 512, 2 x buff
    SYNCDELAY;

    EP6CFG=0x00;        //invalid
    SYNCDELAY;
    EP8CFG=0x00;        //invalid
    SYNCDELAY;                   

    OUTPKTEND=0x82;
    SYNCDELAY;                   
    OUTPKTEND=0x82;
    SYNCDELAY;                   
    OUTPKTEND=0x84;
    SYNCDELAY;                   
    OUTPKTEND=0x84;
    SYNCDELAY;                   

    EP2FIFOCFG=0x18;    //AUTOIN,AUTOOUT,8-bit data bus
    SYNCDELAY;
    EP4FIFOCFG=0x00;    //manual, 8-bit data bus
    SYNCDELAY;

//to define buswidth==8-bit for all EP (disabled too !!)
    EP6FIFOCFG=0;    //8-bit data bus
    SYNCDELAY;
    EP8FIFOCFG=0;    //8-bit data bus
    SYNCDELAY;

    EP2BCL = 0x80;                // arm EP2OUT
    SYNCDELAY;                   
    EP2BCL = 0x80;
    SYNCDELAY;                   

    EP4BCL = 0x80;                // arm EP4OUT
    SYNCDELAY;                   
    EP4BCL = 0x80;   
    SYNCDELAY;

//Flags
    PINFLAGSAB=0xc8;    //FlagB - Full for EP2; FlagA - Empty for EP2
    SYNCDELAY;
    PINFLAGSCD=0x04;    //FlagD - PA7                     ; FlagC - Prg. for EP2
    SYNCDELAY;
    FIFOPINPOLAR=0x00;
    SYNCDELAY;

//Port D
    OED=0xff;         //OutputEnable port D (1-output, 0-input)
    IOD=0x00;         
}

void TD_Poll(void)              // Called repeatedly while the device is idle
{
    unsigned char tmp;

    if(!(EP2468STAT & 0x04))
    {
        tmp=EP4FIFOBUF[0];

        SYNCDELAY; 
        OUTPKTEND=0x84;
        SYNCDELAY; 
        OUTPKTEND=0x84;
        SYNCDELAY; 

        IOD=tmp;

        if(tmp==0x01)         //switch EP2 to IN
        {
            SYNCDELAY;                   
            FIFORESET=0x80;
            SYNCDELAY;                   
       
            SYNCDELAY;
            EP2CFG=0xe2;        //valid, in, bulk, 512, 2 x buff
            SYNCDELAY;

            FIFORESET=0x80;
            SYNCDELAY;                   
            FIFORESET=0x82;
            SYNCDELAY;                   
            FIFORESET=0x00;
            SYNCDELAY;           
           
            INPKTEND=0x82;
            SYNCDELAY;       
            INPKTEND=0x82;
            SYNCDELAY;       
   
            EP2FIFOCFG=0x18;    //AUTOIN,AUTOOUT,8-bit data bus
            SYNCDELAY;
            EP2AUTOINLENH=0x02;
            SYNCDELAY;
            EP2AUTOINLENL=0x00;

            EP2BCH=0x00;
            SYNCDELAY;       
            EP2BCH=0x00;
            SYNCDELAY;                   
            EP2BCL=0;
            SYNCDELAY;                   
            EP2BCL=0;
            SYNCDELAY;                   
        }
        else             //switch EP2 to OUT
        {
            SYNCDELAY;
            EP2CFG=0xa2;        //valid, out, bulk, 512, 2 x buff
            SYNCDELAY;
            SYNCDELAY;
        }
    }
}

Thus, I use EP4 (BULK, OUT, 512x2, MANUAL MODE, 8-bit) for switching EP2 (BULK, OUT, 512x2, AUTO MODE, 8-bit) direction and at the same time for changing status of pin D0 for its use by external device.
My question: why after switching from OUT to IN the FULL FLAG always becomes active (low)?

Thank you for your help
Victor

Hi Victor,

                    I have two concerns in your code.                

1.     Endpoint configuration that you have used is not a valid configuration. Please go through Section 1.18 "EZ-USB Endpoint Buffers" of TRM for valid endpoint configurations.

2.     Why do you use EP2 as bidirectional? Endpoint configuration in firmware shouldn't contradict with the configuration in descriptor file. Why can't you use other two EPs instead of using EP2 as bidirectional?

Hi

Thanks for your answer

1. Is it valid configuration now?

    EP2CFG=0xa2;        //valid, out, bulk, 512, 2 x buff
    SYNCDELAY;
     EP4CFG=0xa0;        //valid, out, bulk, 512, 2 x buff
    SYNCDELAY;

    EP6CFG=0x62;        //invalid
    SYNCDELAY;
    EP8CFG=0x62;        //invalid
    SYNCDELAY;    

2. The point is I have not free pins in my pheripheral device for addressing two endpoints

Hi Victor,

                 1. This is not a valid configuration.You can use configuration1 i,e all EPs as valid and double buffered. 

                  2. How do you select between EP2 and EP4? How many pins you have free?