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The communication between 67300 and FPGA
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The communication between 67300 and FPGA

sunlei posted on 09 Nov 2011 7:08 PM PST
Top Contributor
21 Forum Posts

Hi,

I want to accomplish the communication between 67300 and FPGA through HPI. Finally, I want to make FPGA read data from the u-disk besides 67300 through HPI.I have known that there are some extended file I/O API provided by cypress for the cy4640 Mass storage reference design across the HPI. I don't want to  make Linux OS based on MCU or PowerPC in FPGA.So, I want to ask you guys can I achieve the HPI communication between 67300 and FPGA without MCU or PowerPC in FPGA

Thanks

Sunlei




Re: The communication between 67300 and FPGA

posted on 11 Nov 2011 10:34 PM PST
Senior Member
11 Forum Posts

Sunlei,

How do you accomplish  communication in your FPGA system without using Power PC or any other MCU?.Is it through VHDL coding?.There are examples in ML403 Xilinx kit using some Plain C coding.You can port that code to your VHDL .Also you can have a look at the ML403 schematics.To implement HPI communication between 67300 and FPGA below are steps

1.Do a feasibility analysis if HPI timing requirements can be met by the FPGA .Please see the datasheet for timing diagrams

2.Observe the HPI Slave pins coming out of the 67300 chip(16 Data lines , 2 ADDR lines ,1 Chip select,1 Read,1WR and 1HPI_INT).You need to have similar I/O pins matching on the HPI Master side i.e FPGA.

    a. The I/O pins of 67300 are 3.3 v Logic High.Please make sure the corresponding FGPA I/O pins are also .3.3 level.If

          they are 5v tolerant I/O pins on FPGA side then you need some voltage translator mechanism on Lines driven by

          FPGA.Here nCS,nRD,nWR and ADDR lines are driven by FGPA(HPI Master )data lines can be driven both the

           chips.So you should need some mechanism in place for all HPI lines.

     b. Make sure RESET  duration of 67300 driven from FPGA  is taken care of as per datasheet requirements

     c.See Pin interconnects diagrams from CY3663 StrongARM board to 67300 as reference .Also you can refer ML403 kit

        from Xilinx if you need addtional reference.

There are some sample codes provided without OS from Xilinx ML403 webpage "ML403 USB demonstration" section at

http://www.xilinx.com/products/boards/ml403/reference_designs.htm

 

Thanks

Narayana Murthy M

 

 

            

 



Re: The communication between 67300 and FPGA

sunlei posted on 13 Nov 2011 05:57 AM PST
Top Contributor
21 Forum Posts

Narayana Murthy M

I have seen your reply,and I will try with your advice!

Appreciate it

sunlei






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