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slfifosync SDK example question
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slfifosync SDK example question

gd_net posted on 06 Jul 2011 9:12 AM PST
Senior Member
17 Forum Posts

Hello,

i want to use the slfifosync SDK example with 8bit parallel data bus width.

Do I have to configurate something inside the source code for this?

Best regards

g.

Re: slfifosync SDK example question

mrao posted on 07 Jul 2011 07:22 AM PST
Cypress Employee
4 Forum Posts

Hi g,

Please do the following,

1. In cyfxslfifogpifdscr.c file change the following line from

     {CY_U3P_PIB_GPIF_BUS_CONFIG_ADDRESS  , 0x000018a7},

   to

   {CY_U3P_PIB_GPIF_BUS_CONFIG_ADDRESS , 0x00001803},

This changes the GPIFII configuration Data bus width setting.

 

2. The address pins A[0] and  A[1] need to be connected to GPIO[8] and GPIO[9] instead of GPIO[28] and GPIO[29].

 

Regards,

Manish Rao

Re: slfifosync SDK example question

Chris R. posted on 21 Jul 2011 11:03 PM PST
Top Contributor
135 Forum Posts

Is it also possible to run the Slave FIFO interface in 32 bit mode?

Re: slfifosync SDK example question

aasi posted on 27 Jul 2011 11:51 AM PST
Cypress Employee
1073 Forum Posts

Hi Chris,

Yep. The 32 bit Slave FIFO support is being worked on. It will be incorporated in the next version of the SDK.

Regards,

Anand

 



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