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才哥 posted
on 20 Jun 2011 1:22 AM PST
Top Contributor
40 Forum Posts
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1,If CY7C68013's slave fifo selects the internal 48MHZ clock, what is the requirements for the SLWR signal in asynchronous bulk transfer?#####################
2,what is the time delay since the FIFO empty untill EF flag active?#####################
3,In my slave fifo auto-in bulk transfer,after the firmware downloading,the EF and FF are low(active high).#####################################################
I use the CYConsole to test the transfer. I find the first packet 512 bytes bulk transfer successfully without writting datum, but the transfer have no data, it displays " bulk in transfer bulk in successfully 0x0000". however, the second bulk transfer would be failed, it will display "bulk in tranfer , bulk in failed" .###########################################
when I write data in fifo,the first packet data would still be some dummy bytes,it also displays " bulk in transfer bulk in successfully 0x0000".but the successive packets are right.####Idon't konw why?
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