I am trying to write data to EP2 (configured as double buffered OUT in manual mode).

For debugging reasons, once the fx2 receives the data, I want it to commit some of the bytes to a packet and send to the host via EP1.

Relevant code: lives in a function which is regularly polled 

		if(!(EP2468STAT & 0x01))
		{
				//EP2EF=0 so not empty
				SYNCDELAY();

				EP1INBUF[0] = 0x09;
				EP1INBUF[1] = EP2FIFOBUF[0];
				EP1INBUF[2] = EP2FIFOBUF[1];
				EP1INBUF[3] = EP2FIFOBUF[2];
				EP1INBUF[4] = EP2FIFOBUF[3];
				EP1INBUF[5] = EP2FIFOBUF[4];
				EP1INBUF[6] = EP2FIFOBUF[5];
				EP1INBUF[7] = EP2FIFOBUF[6];
				EP1INBUF[8] = EP2FIFOBUF[7];
				EP1INBUF[9] = EP2FIFOBUF[256];
				EP1INBUF[10] = EP2FIFOBUF[257];
				EP1INBUF[11] = EP2FIFOBUF[258];
				EP1INBUF[12] = EP2FIFOBUF[259];
				EP1INBUF[13] = EP2FIFOBUF[260];
				EP1INBUF[14] = EP2FIFOBUF[261];
				EP1INBUF[15] = EP2FIFOBUF[262];
				EP1INBUF[16] = EP2FIFOBUF[263];
				EP1INBUF[17] = EP2468STAT;
				EP1INBC = 18;

				SYNCDELAY();
				OUTPKTEND = 0x02; //pass on and re-arm
		}

The data in EP1BUF[17] returns as 0x64 for the first packet, and 0x66 for the second packet sent.

section 1.18 EZ-USB Endpoint Buffers (page 32) contains the allowed endpoint configurations. Most probably you are configuring just EP2 to double buffering and putting the endpoint FIFOs in an unknown state. Configure the endpoint FIFOs to one of the 12 allowed configuration and things should work fine.

Regards,

Anand 

 In my init function, I configure all 4 EPs, so I don't see why it should be in an unknown state:

		//Slave EPs setup
		EP2CFG = 0xA2; SYNCDELAY(); //BULK OUT 512 2x
		EP4CFG = 0xA2; SYNCDELAY(); //BULK OUT 512 2x
		EP6CFG = 0xE2; SYNCDELAY(); //BULK IN 512 2x
		EP8CFG = 0xE2; SYNCDELAY(); //BULK IN 512 2x

		//Slave FIFO setup
		FIFORESET = 0x80; SYNCDELAY();
		FIFORESET = 0x82; SYNCDELAY();
		FIFORESET = 0x84; SYNCDELAY();
		FIFORESET = 0x86; SYNCDELAY();
		FIFORESET = 0x88; SYNCDELAY();
		FIFORESET = 0x00; SYNCDELAY();

Are you priming the pump for the out endpoints using OUTPKTEND = 0x82 etc, here 2 is the endpoint number of the out endpoint.

Better yet can you post your init part of the code here.

Regards,

Anand

 Sure. The whole user init function:

void init_user()
{
		EA = 0;

		CPUCS = 0x10; //48MHz
		IFCONFIG = 0xE3; //INTCLK, 48, DRIVE, SYNC, SLAVE
		SYNCDELAY();
		

		//Setup debug endpoints
		EP1OUTCFG = 0xB0; SYNCDELAY(); //Interrupt
		EP1INCFG = 0xB0; SYNCDELAY(); 
		REARMEP1OUT();

		//Setup LED output, and light it
		PORTCCFG &= ~0x80;
		OEC |= 0x80;

		//Slave EPs setup
		EP2CFG = 0xA2; SYNCDELAY(); //BULK OUT 512 2x
		EP4CFG = 0xA2; SYNCDELAY(); //BULK OUT 512 2x
		EP6CFG = 0xE2; SYNCDELAY(); //BULK IN 512 2x
		EP8CFG = 0xE2; SYNCDELAY(); //BULK IN 512 2x

		//Slave FIFO setup
		FIFORESET = 0x80; SYNCDELAY();
		FIFORESET = 0x82; SYNCDELAY();
		FIFORESET = 0x84; SYNCDELAY();
		FIFORESET = 0x86; SYNCDELAY();
		FIFORESET = 0x88; SYNCDELAY();
		FIFORESET = 0x00; SYNCDELAY();

		PINFLAGSAB = 0x98; SYNCDELAY(); //EP2EF, EP4EF
		PINFLAGSCD = 0xEF; SYNCDELAY(); //EP6FF, EP8FF
		FIFOPINPOLAR = 0x00; SYNCDELAY();


		//Manual mode
		EP2FIFOCFG = 0x01; SYNCDELAY(); //WW

		//Arm the pump
		OUTPKTEND = 0x82; SYNCDELAY();
		OUTPKTEND = 0x82; SYNCDELAY();

		EP6FIFOCFG = 0x00; SYNCDELAY();
		EP6FIFOCFG = 0x0D; SYNCDELAY(); //AUTOIN, ZEROLEN, WW
		EP8FIFOCFG = 0x00; SYNCDELAY();
		EP8FIFOCFG = 0x0D; SYNCDELAY(); //AUTOIN, ZEROLEN, WW
		EP6AUTOINLENH = 0x02; SYNCDELAY();
		EP6AUTOINLENL = 0x00; SYNCDELAY();
		EP8AUTOINLENH = 0x02; SYNCDELAY();
		EP8AUTOINLENL = 0x00; SYNCDELAY();

		EA = 1;
}

Hi Ali,

Sorry I didn't read the post properly earlier.

when the first packet is sent, the buffer is 2 packet wide and it has 1 packet in it so it is neither empty nor full. So 0x64 is a legal value.

When you send the second packet, the buffer is 2 packet wide and it has 2 packets so it is full. So 0x66 is the right value. Hope this clears your doubt.

Regards,

Anand

Hi,aasi

why does my FX2LP EP6FF remain high always,which reflected by FLAGB configured in firmware?

Appearance:

 for(i=0;i<1125;i++)
 {    
  for(j=0;j<512;j++)
  {
   *(Uint8 *)USB_FIFO6_ADDR=iCount;
   while(USB_FLAGB==1);//stopping here always.
  }
  
  iCount++;
  if(iCount==256)
  {
   iCount=0;
  }
 }

 for(i=0;i<1125;i++)
 {    
  for(j=0;j<512;j++)
  {
   *(Uint8 *)USB_FIFO6_ADDR=iCount;
   while(USB_FLAGB==0);//not stopping here ,but some data will be lost  when data be received from pc.
  }
  
  iCount++;
  if(iCount==256)
  {
   iCount=0;
  }
 }

why?is FX2LP damaged or my firmware does not configured correctly?

i 'm letted be in my casese.

thank you.

When EP6 is full you should be reading packets from EP6 for its full flag to de-assert. Is this being done?

Yes,i have readed them out from PC Software.but can't read data because  dsp code stopping in this :

while(USB_FLAGB==1);

That is :

My FX2LP FLAGB remains High always after reseting or starting.why??