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Comminting an OUT packet from firmware
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Comminting an OUT packet from firmware

sinosoidal posted on 17 May 2010 11:20 AM PST

1 Forum Post

 Hi,

I have already given a deep read into the TRM and the example by I still didn't managed to achieve what I want.

I'm trying to handle a control message which when detected, make an OUT packet by firmware. The first part is done. My control message is received in the right switch case. Let me just give a little context.

I need this case because i'm using several cores connected to the cypress and they are receiving simultaneous information thru OUT packets directly from the FIFO buffer (AUTOIN = 1). However, in Windows, bulk transfers are much more difficult to implement that the control transfer. So, in order to make use of the same process i have already used in the past with other USB chip (for the same kind of application), i'm trying this approach.

That is... i'm trying to form an OUT packet on the firmware side, by the time I get a certain control message, as I said before. Well.. this is the code i'm using to do it (EP2 is the OUT endpoint): 

 

case SETUP_VENDOR_REQUEST:
{

if (SETUPDAT[1]==0x00)
{

unsigned int len = ((int)EP2BCH)<<8 | EP2BCL;

for(i=0; i<1024; i+=4)
{

*dest = 1;
*dest++;
*dest = 0;
*dest++;
*dest = 0;
*dest++;
*dest = 0;
*dest++;
}

EP2BCH = 3; SYNCDELAY; 
EP2BCL = 0; SYNCDELAY;
}
}

break;

And this is the configuration for endpoint 2

// Configure EP2 (OUT) for bulk output, double-buffered (2*512 bytes).
EP2CFG = 0xa2;  SYNCDELAY;

FIFORESET = 0x80;  SYNCDELAY;  // NAK all requests from host.
FIFORESET = 0x82;  SYNCDELAY;  // Reset individual EP (2,4,6,8)
FIFORESET = 0x84;  SYNCDELAY;
FIFORESET = 0x86;  SYNCDELAY;
FIFORESET = 0x88;  SYNCDELAY;
FIFORESET = 0x00;  SYNCDELAY;  // Resume normal operation.

OUTPKTEND = 0x82;  SYNCDELAY;
OUTPKTEND = 0x82;  SYNCDELAY;

// Configure EP2 for AUTOOUT, 16bit wide bus.
// EP2FIFOCFG = 0x11;  SYNCDELAY; 
EP2FIFOCFG = 0x01;  SYNCDELAY; // now configured as AUTOOUT=0

// PORTACFG: FLAGD SLCS(*) 0 0 0 0 INT1 INT0
PORTACFG = 0x00;  SYNCDELAY; // (delay maybe not needed)

It happens that the OUT packet seems that is never passed to the FIFO connected hardware.

What am I missing here?

Thx,

With my best regards,

Nuno

 







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