Cypress's new XDR clock generator is optimized to provide the high performance clock signals required for both the Rambus Inc. XDR™ (Extreme Data Rate) memory systems and the FlexIO™ processor bus interface supporting applications that employ the new "Cell processor" architecture. The Cell processor, developed jointly by IBM, Sony and Toshiba, is optimized for the kind of real-time calculations needed in today's broadband, media-rich environment such as game consoles, consumer electronics, and advanced computing systems. It employs nine processors on a single chip, with a specially designed 300-gigabit-per-second bus knitting the processors into a single machine. The Rambus XDR memory and FlexIO processor bus interfaces account for 90% of the Cell processor signal pins, providing an unprecedented aggregate processor I/O bandwidth of approximately 100 gigabytes-per-second. Click below to download a high-resolution jpeg image of the CY24271ZXC XDR clock generator. |
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